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Computer Organization and Architecture (ITC404)
Unit I Overview of Computer Architecture & Organization
Session 1 : Introduction of Computer Organization and Architecture. Basic organization of computer and block level description of the functional units. Evolution of Computers
Session 2 : Von Neumann model. Performance measure of Computer Architecture. Architecture of 8086 family
Session 3 : 8086 Hardware Design, Minimum mode & Maximum mode of Operation
Session 4 : Study of bus controller 8288 & its use in Maximum mode
Unit II Programming 8086
Session 5 : Addressing modes, Instruction Set, Assembly Language Programming
Session 6 : Mixed Language Programming, Programs based on Stacks, Strings,
Session 7 : Procedures, Macros, Timers, Counters & delay.
Unit III Processor Organization and Architecture
Session 8 : CPU Architecture, Register Organization, Instruction formats
Session 9 : basic instruction cycle. Instruction interpretation and sequencing
Session 10 : Control Unit: Soft wired (Microprogrammed) and hardwired control unit design methods
Session 11 : Microinstruction sequencing and execution. Micro operations
Session 12 : concepts of nano programming. Introduction to parallel processing concepts
Session 13 : Flynn’s classifications, pipeline processing, instruction pipelining
Session 14 : pipeline stages, pipeline hazards
Unit IV Data Representation and Arithmetic Algorithms
Session 15 : Number representation: Binary Data representation,
Session 16 : two’s complement representation and Floating-point representation.
Session 17 : Integer Data arithmetic: Addition, Subtraction. Multiplication: Unsigned & Signed multiplication- Add & Shift Method
Session 18 : Booth’s algorithm. Division of integers: Restoring and non-restoring division, signed division
Session 19 : basics of floating point representation IEEE 754 floating point(Single & double precision) number representation
Session 20 : Floating point arithmetic: Addition, subtraction
Unit V Memory Organization
Session 21 : Introduction to Memory and Memory parameters.
Session 22 : Classifications of primary and secondary memories
Session 23 : Types of RAM and ROM, Allocation policies
Session 24 : Memory hierarchy and characteristics. Cache memory: Concept
Session 25 : architecture (L1, L2, L3), mapping techniques. Cache Coherency
Session 26 : Interleaved and Associative memory.
Unit VI I/O Organization
Session 27 : Input/output systems, I/O modules and 8089 IO processor
Session 28 : Types of data transfer techniques: Programmed I/O, Interrupt driven I/O and DMA.
Session 10 : Control Unit: Soft wired (Microprogrammed) and hardwired control unit design methods
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